Intel packs Optane module with 3D X-Point

Article By : Jeongdong Choe

A TechInsights teardown of an Intel Optane M.2 80mm 16GB PCIe 3.0 has revealed a 3D X-Point memory die in the package.

TechInsights has acquired and tore down an Intel Optane M.2 80mm 16GB PCIe 3.0, revealing the first commercial 3D X-Point product from Intel and Micron.

The Intel 3D X-Point memory package size is 17.6mm x 13.7mm and a single X-Point Memory die is contained within. The 3D X-Point Memory die measures 16.16mm x 12.78mm. Memory efficiency in the die is 91.4% which is higher than the Samsung 3D 48L V-NAND (70.0%) and the Intel/Micron 3D FG NAND (84.9%). Memory density of the 3D X-Point Memory is 0.62Gb/mm2 which is lower than commercial 2D and 3D NAND products (2.5Gb/mm2 for Toshiba/SanDisk and Samsung 3D 48L TLC NAND, and 1.28Gb/mm2 for Toshiba/SanDisk 2D 15nm TLC NAND).

However, compared to DRAM products, the 3D X-Point memory density is 4.5 times higher than DRAM products with the same 20nm technology or 3.3 times higher than Samsung’s 1xnm DDR4. X-Point memory products use 20nm technology node for both WL and BL with 0.00176µm2 cell size which is about half of the DRAM cell size. This is due to a stackable memory cell and 4F2 instead of 6F2 being used for memory cell array design.

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Figure 1: X-Point Memory Package (Source: Intel 3D XPoint, TechInsights)

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Figure 2: X-Point Memory Die (16 GB) (Source: Intel 3D XPoint, TechInsights)

Intel X-Point Memory is a PCM (phase change memory) with a double storage-selector stacked memory cell between metal 4 and metal 5. GST-based materials are used for the storage, while As (arsenic) doped chalcogenide materials (Se-Ge-Si) are used for the selector in which As might be used to suppress crystallisation. This is likely a type of Ovonic Threshold Switch (OTS) structure. We found that the 3D X-Point memory layers are placed between metal 4 and metal 5 and connected with a few selector contact plugs on metal 4. We’ll be digging deeper into the device to find more innovative technology, and we’ll share that with you in the near future.

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Figure 3: X-Point Memory Array X-section SEM and TEM images (Source: Intel 3D XPoint, TechInsights)

First published by EE Times U.S.

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