Designware IP subsystem adds IoT, sensor support
The Data Fusion IP Subsystem is an integrated, pre-verified hardware and software IP product for devices requiring minimal energy consumption.
Resistance scaling fixes PNR, signoff STA mismatch
Resistance scaling is a powerful tool for meeting timing demands, particularly when there is miscorrelation between PNR and signoff STA…
Resistance scaling affects other design parameters
Applying resistance scaling can have side effects on other design parameters, like shorts, DRCs and density.
Design software adds headlight safety test
The test capability in LucidShape 2017.03 allows designers to perform illuminance-based visibility range tests and glare test for oncoming traffic.
Photorelay offers increased density in smaller boards
Toshiba’s TLP3406S photorelay offers small on-resistance and on/off switching currents of 1.5A in 2.00mm x 1.45mm size.
Synopsys Coverity adds Forcheck static analysis
Forcheck technology integrated into Synopsys' Coverity static analysis system provides support to software written in Fortran language.
Road to innovating machine learning chips
The AI community is aiming for higher performance and more power efficient inference engines for deep neural networks.
Realising AI chip goals
CEA believes a neuromorphic circuit is a valid complement to deep learning to extract information from data close to the…
Synopsys, IIT develop TCAD model for 5nm FinFET simulation
Synopsys and IIT Bombay have developed the Sentaurus TCAD model for negative-bias temperature instability (NBTI).
NXP integrates Mindtree IP in MCU
NXP's Kinetis KW41Z microcontroller incorporates MindTree's 4.2 Bluetooth Smart IP, BlueLitE.