ARM programme paves the road to faster SoC design for IoT

Article By : ARM

The addition of Cadence and Mentor Graphics tools for ARM DesignStart platform users accelerates the development of custom SoCs for embedded and Internet of Things applications.

ARM has extended its ARM DesignStart platform to deliver what it says are simplified and expedited access to EDA tooling and design environments from Cadence and Mentor Graphics.

The move by the company builds on the benefits of free access to ARM Cortex-M0 processor IP offered through the DesignStart portal. In addition, the latest ARM Approved Design Partner programme affords DesignStart users with a global list of audited design houses for expert support during development.

Today, the DesignStart portal offers SoC designers free access to ARM Cortex-M0 processor IP for design, simulation and prototyping with the option to buy a simplified and standardised ₹26.62 lakh ($40,000) fast track license. The addition of Cadence and Mentor Graphics tools for DesignStart users accelerates the development of custom SoCs for embedded and Internet of Things (IoT) applications. With test chips from as little as ₹10.65 lakh ($16,000) to manufacture (not inclusive of EDA tooling and IP licensing costs), the path to custom SoCs is now much easier, ARM stated.

The DesignStart portal, which also gives access to a broad range of ARM Artisan physical IP, is available at http://designstart.arm.com.

The ARM Approved Design Partner programme creates a network of leading design houses that will assist partners designing an SoC for the first time and help in-house teams needing additional support. To be part of the ARM Approved Design Partner programme, design houses have to go through a stringent ARM auditing process to ensure they meet the highest quality standards.

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